This invention relates generally to lead frames for use in integrated circuit packaging and more particularly, to a fine pitch lead frame where the pitch (i.e., the distance between the centers of adjacent leads) is very small.
Referring to FIG. 1, a lead frame 10 is generally comprised of a die pad area 17, die pad support arms 15 and leads 11. In the manufacture of conventional lead frames the die pad area 17, support arms 15 and leads 11 are formed in one step. The lead forming step may be either an etching process or a stamping process. In these processes the areas between the leads 11 and between the lead tips 12 are removed through respectively stamping or etching. The area between the lead tips are usually referred to as slots 14. In the etching process, a mask of the pattern of leads, die pad area and support arms is laid over a metal strip. The exposed areas are then etched away creating the slots 14 between the leads. The stamping process usually consists of stamping out the slots 14 between the leads, die pad area 17 and support arms 15. Multiple stamp tool punches, shaped in the form of the respective slots 14, punch out the slots 14.
The leads 11 are formed around the die pad area 17. As the leads approach the die pad area they become narrower and narrower and the distance between the leads become smaller. This results in a finer pitch between the centers of the lead tips 12 as the leads get smaller and smaller. The lead tips 12 are formed to have the smallest pitch possible so the maximum number of leads can approach the die pad area 17 and to allow the leads to get as close as possible to the die pad area 17.
The support arms 15 extend out from the die pad area supporting the die pad area during handling. An integrated circuit is placed on the die pad area 17, in the center of the lead
The support arms 15 extend out from the die pad area supporting the die pad area during handling. An integrated circuit is placed on the die pad area 17, in the center of the lead frame 10. After the leads 11, die pad area 17 and support arms 15 are formed, the lead frame 10 may be annealed to strengthen and relieve stress on the leads and support arms. This may be followed by plating the lead tips 12 with an electrically conductive material. Plating also allows for better bonding to the bonding wires when the leads are connected to the integrated circuit.
The leads may then be taped with an adhesive strip to keep the leads from moving during handling. The adhesive strip may be a single picture frame style strip that is placed across the leads. An alternative is the application of separate strips placed across a set of leads. The former process allows for better tolerances when the tape either shrinks or expands causing the leads to move. Then, the lead frame 10 may be trimmed to free the lead tips 12 from the die pad area 17.
After trimming, the lead frame is ready to be packaged. An integrated circuit is placed on the die pad area 17 and bonded to the lead tips 12 with bonding wires. The inner portion of the lead frame 20 is then encapsulated with an encapsulating material. The excess metal that supported the entire lead frame 22 is then trimmed away to free the leads 11 from each other. The end product is a packaged semiconductor device.
Semiconductor manufacturers are creating integrated circuits with smaller and smaller die sizes and at the same time increasing the number/of 11in, s they require. For example, integrated circuit manufacturers are developing dies for 208 pin quad flat packages (QFP) that have a bonding pad pitch of 4 mils and requiring a 13 mil space at the corners. Therefore, a die with 208 bonding pads (i.e., 52 bonding pads per side) is approximately 0.234 by 0.234 inches in size. Semiconductor assemblers require a 0.010 inch margin around the die. Therefore, the minimum die pad size is 0.254 inches square for a 208 pin die. As the die sizes of integrated circuits get smaller the lead tips on the lead frames need to get finer and finer in pitch in order to approach the ever shrinking integrated circuit. Current die pads are approximately 0.433 inches square since conventional leads, limited by pitch, cannot approach a smaller die pad. Long bonding wires can connect currently available lead frames with the integrated circuits of a smaller die size. Although, interference and crosstalk occurs in long bonding wires making this method undesirable. This creates pressure on manufacturers of lead frames for integrated circuit packaging to obtain smaller and smaller pitches in their lead frames. A solution to the problem utilizes a finer pitch lead frame.
The limitations of stamping and etching technologies currently constrain the process for making lead frames. Both stamping and etching can only obtain a slot width (the width between adjacent lead tips) of about 4 mils in a 6 mil thick metal strip. This results in a lead tip 4 mils wide and a slot 4 mils wide which gives the lead tips an 8 mil pitch between the centers of two adjacent lead tips. The 8 mil pitch corresponds to the presently obtainable ratio of stamping slot width versus strip thickness of approximately 4:6 in a 6 mil. Therefore, if a thinner metal strip is used, such as a 3 mil strip, a pitch of approximately 5.5 mils is obtainable, which can and has been accomplished with current stamping technologies.
Stamping technology is limited by the ability to punch through a given thickness of metal or other electrically conductive material. A stamp tool punch smaller than the 4:6 ratio is subject to breakage. For example, a stamp tool punch smaller than 3.5 mils thick would not be able to punch through a 6 mil thick metal strip without repeatedly breaking. Etching technology is similarly constrained due to the ability to control the etching process. Due to the diffusion of an etchant during exposure the slots become more irregular through a thicker material. The diffusive nature of etching limits its ability to etch out fine pitch lead frames. As discussed above, the use of thinner material will allow the manufacture of finer pitch lead frames.
Although, a thinner metal strip provides a finer pitch lead frame another constraint is the requirement of using strips of a particular thickness from chip package manufacturers. Presently, 6 mils is the most common standard used in the art. The standard exists due to present manufacturing and molding technologies that rely upon the 6 mil standard as well as the customer's insistence upon the usage of 6 mil thick lead frames. Therefore, in such systems the problem becomes obtaining a finer than 8 mil pitch using a 6 mil thick strip.
One technique for accommodating smaller integrated circuit dies is the method of interposing. Interposing consists of using a conventional lead frame with a conventional pitch and bonding a miniature printed circuit board on top of the lead tips. The printed circuit consists of fine pitch traces from the lead tips to the integrated circuit die which is bonded onto the printed circuit board. While this process leads to smaller pitch lead frames it is prohibitively expensive.
Another technique used is to extend every other lead tip. The extended lead tips are shaped to maintain a 4 mil space between the extended tips and the adjacent unextended tips. The ends of the extended tips end in a rectangular pad large enough for bonding. The extended tips allow the centers of the untapered tips and the centers of the tapered tips to approach closer to each other giving a smaller pitch. This technique is only capable through etching and gives only an incrementally smaller pitch, as for example, approximately 7 mils in 6 mil thick lead frames.
The present invention provides a method for obtaining significantly finer pitches from a given strip, although it is not limited to a specific thickness and can be applied to other thicknesses. The presently disclosed method lends itself especially to the manufacture of lead flames for QFP devices, although not limited to such packages. Further, the invention is not prohibitively expensive and is possible with current technology.